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Microchip Technology /ATSAML11E16A /OSCCTRL /DFLLULPDLY

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Interpret as DFLLULPDLY

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DELAY

Description

DFLLULP Delay Value

Fields

DELAY

Delay Value

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data